With the development in technology and process of thin film transistors of flat panel display devices, liquid crystal panels are developing to have high resolution and high definition. FIG. 1 is a structure of color filter (comprising a color filter 107 and a black matrix 106) on Array (COA), i.e., a COA array substrate, and since there is no problem of light leak due to substrates alignment, width of the black matrix 106 can be effectively reduced, thus increasing aperture ratio of a pixel and further improving transmittance of the panel. When COA technology is combined with Advanced Super Dimension Switch liquid crystal display technology which mainly depends on in-plane rotation of liquid crystal molecules, light leak in an oblique direction can be effectively prevented, and further occurrence of color mixing can be avoided. Thus, this technology has become one of the competitive technologies in high-definition products.
As shown in FIG. 1, generally, a basic structure of a COA array substrate includes a pattern including a thin film transistor formed on a substrate 101, wherein the thin film transistor may be of top-gate type or bottom-gate type, and a bottom-gate type thin film transistor is taken as an example here. The thin film transistor specifically includes: a gate 102, a gate insulating layer 103 covering the gate 102, an active region 104 provided on the gate insulating layer 103 and source and drain 105, and the source and drain 105 are connected to the active region 104. A light filtering layer 107 is provided on the substrate 101 on which the thin film transistor has been formed; a planarization layer 108 is provided on the light filtering layer to eliminate level difference; then a first electrode layer (common electrode) 110, a passivation layer 111 (PVX) and a second electrode layer (pixel electrode) 112 are sequentially provided, wherein the second electrode layer (pixel electrode) 112 is connected to the drain 105 of the thin film transistor through a contacting via 109 penetrating through the passivation layer 111, the first electrode layer (common electrode) 110, the planarization layer 108 and the light filtering layer. In this case, since at the contacting via 109, liquid crystals may be irregularly arranged and thus light leak may occur, the drain 105 needs to be lengthened, so as to avoid light leak. However, an increase in the length of the drain 105 will result in decreased aperture ratio and increased power consumption of the product. Moreover, since the contacting via 109 is relatively deep, and its opening at the top is relatively large, the aperture ratio of the COA array substrate is further affected. Further, the relatively deep contacting via 109 may likely lead to disconnection, which results in that the pixel electrode is disconnected with the drain and the pixel cannot be charged.